shadow_cntrl = __get_vvmcs(nvcpu->nv_vvmcx, VM_EXIT_CONTROLS);
shadow_cntrl &= ~(VM_EXIT_SAVE_DEBUG_CNTRLS
| VM_EXIT_LOAD_HOST_PAT
- | VM_EXIT_SAVE_GUEST_EFER);
+ | VM_EXIT_LOAD_HOST_EFER);
shadow_cntrl |= host_cntrl;
__vmwrite(VM_EXIT_CONTROLS, shadow_cntrl);
}
VMCS_LINK_POINTER,
GUEST_IA32_DEBUGCTL,
GUEST_PAT,
+ GUEST_EFER,
/* 32 BITS */
GUEST_ES_LIMIT,
GUEST_CS_LIMIT,
VM_EXIT_IA32E_MODE |
VM_EXIT_SAVE_PREEMPT_TIMER |
VM_EXIT_SAVE_GUEST_PAT |
- VM_EXIT_LOAD_HOST_PAT;
+ VM_EXIT_LOAD_HOST_PAT |
+ VM_EXIT_SAVE_GUEST_EFER |
+ VM_EXIT_LOAD_HOST_EFER;
/* 0-settings */
data = ((data | tmp) << 32) | tmp;
break;
case MSR_IA32_VMX_ENTRY_CTLS:
/* bit 0-8, and 12 must be 1 (refer G5 of SDM) */
tmp = 0x11ff;
- data = VM_ENTRY_LOAD_GUEST_PAT;
+ data = VM_ENTRY_LOAD_GUEST_PAT |
+ VM_ENTRY_LOAD_GUEST_EFER;
data = ((data | tmp) << 32) | tmp;
break;
GUEST_IA32_DEBUGCTL_HIGH = 0x00002803,
GUEST_PAT = 0x00002804,
GUEST_PAT_HIGH = 0x00002805,
+ GUEST_EFER = 0x00002806,
+ GUEST_EFER_HIGH = 0x00002807,
GUEST_PDPTR0 = 0x0000280a,
GUEST_PDPTR0_HIGH = 0x0000280b,
GUEST_PDPTR1 = 0x0000280c,
GUEST_PDPTR3_HIGH = 0x00002811,
HOST_PAT = 0x00002c00,
HOST_PAT_HIGH = 0x00002c01,
+ HOST_EFER = 0x00002c02,
+ HOST_EFER_HIGH = 0x00002c03,
PIN_BASED_VM_EXEC_CONTROL = 0x00004000,
CPU_BASED_VM_EXEC_CONTROL = 0x00004002,
EXCEPTION_BITMAP = 0x00004004,